Title: Analog IC Design Engineer, Principal
Location: Santa Clara, CA, US
Shift: Hybrid
Job description
Master’s degree and/or PhD in Electrical Engineering and 5+ years of experience.
* The ideal candidate should have a deep understanding of analog mixed-signal design with experience in high-speed transceivers.
* Solid understanding and experience of designing analog mixed-signal circuit blocks including PLL, phase interpolator, low jitter clock distribution, Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs, Filters
* In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
* Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE
* Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
* Familiarity with CDR architectures and implementations
* Design experience in advanced CMOS technologies, design with FinFet technology
* Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
* Experience in lab testing of high-speed transceivers
Job Type: Full-time
Pay: $180,855.49 - $240,395.86 per year
Benefits:
- 401(k) matching
- Paid time off
Ability to Commute:
- Santa Clara, CA 95050 (Preferred)
Ability to Relocate:
- Santa Clara, CA 95050: Relocate before starting work (Required)
Willingness to travel:
Work Location: In person